386sx-16

[bender]

hi i have got a old computer thats has a 386sx-16 cpu and i was thinking that io may be able to make some type of computer out of it. any idears

[Dingo]

The key considerations would be:
* Overall size (how big is the motherboard? plus hdd?)

* Power supply (Modern PC's require 5v and 12v and have to be pretty clean - I think at 50Hz or something)

*How many IO pins you get. ie I assume one 25 Serial and one parallel to interface with the rest of the robot or project.

*Maybe output - LCD, LED, piezo?

Overall I always think adding PCs to robot is a good idea just becuase of the flexibility of and Intel based chip

[ZapBrannigan]

I would not bother with the parallel or serial interface for the comms with other parts of the robot.... you would probably be better off getting your own memory mapped io happening.
Using 21 address lines, you can address 64K (16 address lines for actual addr) off 5 different devices (ROM, RAM, Keyboard, LCD, other IO). You could be even smarter with that and use only 19 address lines, using 3 address lines in a 3 to 8 decoder and address 8 different devices.
Memory mapped in my opinion is a lot easier to work with, and would probably save a fair bit of coding.

[Dingo]

That's a good idea - do you have any links for that?

[ZapBrannigan]

I don't have any links for that as that is the kind of stuff we did at Uni (Computer Systems Engineering course).

We had to create a simple computer from component parts and the way I did it is the way I described it.

We had a Z80 cpu and had to access external ROM, RAM and I attached two 7 seg displays for output and DIP switches for input.

I think we had 12 lines for addressing, of which I used the upper 3 through a decoder (ie, 74HC138) for chip select, leaving me 9 bits for addressing for a total of 512 bytes across 8 devices. As the code was going to be tiny, I did not need any more than that.

The data bus was separate and was 8 bits. The enables are what would put each device into high impedance to take them off the bus when not selected.

The io for the DIPs and 7 Seg displays would be controlled via a tri state buffer, to a) hold the output state, and b) take the device off the data bus when not selected c) help drive/sink the appropriate current.

Assuming active low logic to enable our different io/mem, we can define which devices are enabled through the decoder...
0 -> all off.
1 -> ROM
2 -> RAM
3 -> Display
4 -> Switches

Hence address pattern looks like this
MSB -> | 3 bits select ||9 bits address| <- LSB

An example, to access address 0x56 from RAM,
| 010 || 001010110 |
= Address 0x456

To make it simple in code, use two different masked variables and bitwise OR them to construct the address.

To access Display
| 011 ||XXXXXXXXX|, (since only one location in display in this implementation, X indicates don't care)
= Address 0x600


Furthermore, if you are careful with the timing and the clock edge (could invert), you can use the chip select enable for the IO buffers to also clock the Input value Out or vice versa, as well as enabling it to the data bus.

I can draw a pic if you need it.

[bender]

ohh so mutch informmation for my tiny brain to take in
i was thinking of using one of the isa slots to control some relays www.aaroncake.net/circuits/crombuld.htm#8bitout

[Bones]

That's the exact site I was going to give you. The other way is to use whats called shift registers. You can say shift 8 bits into it and then shift the infomation one by one through a cable (something like serial) that when it gets to the other end you can shift the info out all 8 bits in one go. Something like the idea of 24 wanting to get from point A to point B on a train where you can only fit 8 people in a carrage and you have 3 carrages. You can load only 1 carrage at a time and the when the train gets to the other end you can then empty the train 1 carrage at a time. This works very nicely when moving data to control devices and you can use a 4 wire cable to transmit the data some distance.
This configiration can be changed around so you can load all the data at the same time, shift all the info and then unload all that info at the same time.
I'll draw up a circuit to be posted.
Bones

[ZapBrannigan]

Sorry Bender,
the implementation I was talking about would be appropriate if you were just using the CPU itself; not taking the motherboard
It is the approach I would use when dealing with a microprocessor instead of a microcontroller (which has built in IO).

But yes, shift registers are another way to go to minimise the number of data lines to remote control areas.

[bender]

all your information is heaps good. that circuit would be nice bones.

[Dingo]

www.rentron.com/Myke1.htm

The above link (2-Wire LCD Interface) showns how to use only two wires to send bytes serially to an LCD by the use of shift registers.

It may or may not be relevant to what Bones was alluding to earlier

[Bones]

This is a link from Benders electronics link

private.addcom.de/KeithWilson/Projects/comint.htm

isa 48 bit I/O card
nice

[Thrashbarg]

kaput.homeunix.org/~thrashbarg/iocard.gif

drew it up just now. Write to ports 2B8h-2BBh and read from 2BCh-2BFh. The inputs act as tri-state buffers but they can be latch if you disconnect pin 11 from +5v and connect it to whatever. Low = latch, high = transparent.

[Dingo]

That looks pretty cool Thrashbarg - do you want me to put a copy of your work up in the projects area?

If so do you want to just write a quick blurb about it so I can put that text there as well?

[Thrashbarg]

yeah, sure. I'll PM you some details.